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Dual-core FFT Processor Based on FPGA

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DOI: 10.23977/jeis.2017.22005 | Downloads: 26 | Views: 3478


Can Zhao 1, Jun Yang 1


1 School of Information Science and Engineering, Yunnan university, Kunming, China

Corresponding Author

Jun Yang


With the increasingly developed processing speed of the processor, the processing speed of the FFT is also higher than that of the past. However, the design of the FFT processor based on FPGA is still dominated by the single core[1]. This design is mainly used for the single nuclear FFT processor where the multi-core era faced the FPGA-based parallelization of the technology. The system uses Verilog HDL language, in the Quartus II 8.0 development platform for layout and routing test, and the final A dual-core FFT processor based on FPGA is implemented.


Processor, FPGA, Dual core, FFT.


Can, Z. , Jun, Y. (2017) Dual-core FFT Processor Based on FPGA. Journal of Electronics and Information Science (2017) 2: 84-87.


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