Implementation of a Circuit for Precise Time Stamping of Synchronous Message
DOI: 10.23977/jeis.2022.070310 | Downloads: 22 | Views: 615
Zhongyang Li 1, Jingxian Xu 1, Hongwei He 1, Shizhen Wang 1, Xiaofei Kang 1, Jun Cao 1, Jing Zhang 1, Zhongyan Zhao 1, Long Zhang 1
1 Beijing Microelectronics Technology Institute, Beijing, China
Corresponding AuthorZhongyang Li
Highly required by distributed network operation, the clock synchronization technology is very important. The transmit time of synchronization packets should be stamped precisely in a clock synchronization system. Time stamping in the physical layer is necessary to obtain the time precisely. This paper introduces a general precision time stamping circuit based on 10Mb/s and 100Mb/s transmission. The circuit is designed and manufactured in 0.18μm CMOS technology supporting Precise Timing Protocol based on IEEE 1588. The circuit is verified by an experimental system. The test results show that the general precision time stamping circuit can mark the stamps for UDP/IPv4 Ethernet format in the physical layer. The circuit has an ability to mark a time stamp in less than 60μs.
KEYWORDSIEEE 1588, Time stamp, Clock synchronization, Ethernet
CITE THIS PAPER
Zhongyang Li, Jingxian Xu, Hongwei He, Shizhen Wang, Xiaofei Kang, Jun Cao, Jing Zhang, Zhongyan Zhao, Long Zhang, Implementation of a Circuit for Precise Time Stamping of Synchronous Message. Journal of Electronics and Information Science (2022) Vol. 7: 69-75. DOI: http://dx.doi.org/10.23977/jeis.2022.070310.
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