Author(s)

Haoyan Hu

Corresponding Author

Haoyan Hu

ABSTRACT

This paper presents a hardware scheme of high-speed image acquisition and processing system based on FPGA. The working principle of high-speed and high-resolution image acquisition system is discussed. The system design is completed based on the researches on burst data temporary storage, large capacity data transfer, high resolution, high frame rate image real-time transmission and large capacity data terminal transmission. The test results of the hardware circuit show that the system can collect and store the high-speed and large-capacity data stream generated by the image sensor. The high-speed image acquisition system designed with the core processor of FPGA greatly simplifies the hardware structure of the system and improves the reliability of the system.

KEYWORDS

High Resolution, High Frame Rate, FPGA