Author(s)

Jinsong Wang, Lin Cao and Yi Yang

Corresponding Author

ABSTRACT

True random number generator (TRNG) plays an important role in computer information security. Based on the general FPGA technology, this paper implements a TRNG module which can increase the output randomness by using d-trigger sampling stage inverter. The TRNG module is only composed of logic gates and can be integrated into any type of LSIC. The TRNG module is designed with Verilog HDL parameterization and its main design parameters can be modified. The system adopts SOPC structure, completes the random data transmission through DMA, and finally sends it to the superior computer through USB interface. The design of the system was verified and tested on the FPGA of Altera Cyclone IV (EP4CE6F17C8). The random data obtained by sampling 1025 inverters with a 50MHz clock did not need random post-processing, and passed the NIST SP 800-22 randomness test directly. After a series of parameter adjustment experiments, the conclusion is drawn that the output randomness is positively correlated with the inverter series.

KEYWORDS

True random number generator; TRNG; randomness