Author(s)

Xiong Yinglyu, Udara Kalingage, HUA Rui, WANG Hanzhi

Corresponding Author

Xiong Yinglyu

ABSTRACT

This paper presents a design and implementation of 8-bit CMOS funnel shifter in a 0.25 μm CMOS process at 2.5 V power supply, which can perform logical, rotate and arithmetic shift by selecting operands and extensions. The structure of proposed funnel shifter is mainly formed by using multiple 2 to 1 Multiplexers (MUXes). The critical propagation path delay of this proposed circuit is also analyzed and measured by injecting appropriate input vectors in this paper (assuming each product output drives 50fF extrinsic load capacitor). The total delay of this programmable funnel shifter can be optimized to 1.65 ns from post-layout simulation results and the layout area of this proposed architecture is about 7680 μm2.

KEYWORDS

Funnel shifter; rotators; arithmetic; multiplexer; critical path delay