Parallel Matched Filtering Algorithm with Low Complexity
DOI: 10.23977/cpcs.2016.11003 | Downloads: 42 | Views: 3636
Cheng Xuhuang 1, Wang Yang 1, Shao Gaoping 1
1 College of Information System Engineering, Information Engineering University, China
Corresponding AuthorCheng Xuhuang
For the problem of double counting in the overlap save algorithm(OSA), this paper presents parallel matched filtering algorithm with low complexity. The current data is segment based on the filter order, then using the quarter discrete fourier transform (QDFT) to reduce the amount of calculation. The calculation result of the previous and current data block are added to obtain the block filter results. Analysis and simulation results show that the algorithm effectively reduces the computational complexity. It is more suitable for high-speed demodulation which has multiple parallel paths.
KEYWORDSoverlap-save; low complexity; parallel matched filter; high speed demodulation.
CITE THIS PAPER
Xuhuang, C., Gaoping, S. and Yang W. (2016) Parallel Matched Filtering Algorithm with Low Complexity. Computing, Performance and Communication systems (2016) 1: 17-21.
 Ramdani M, Sicard E, Boyer A, et al. The Electromagnetic Compatibility of Integrated Circuits—Past, Present, and Future[J]. IEEE Transactions on Electromagnetic Compatibility, 2009, 51(1):78-100.
 SHIHONG D, YAMU H, SAWAN M. A high data rate QPSK demodulator for inductively powered electronics implants[C]//IEEE International Symposium on Circuits and Systems Island of Kos. Greece: IEEE, 2006: 2577-2580.
 Chenghuan X, He C, Shunan Z. Design and Implementation of a High-Speed Programmable Polyphase FIR Filter[C]// IEEE 5th ASIC, 2003, 2: 783-787.
 Gustafsson O, Dempster A G. On the Use of Multiple Constant Multiplication in Polyphase FIR Filters and Filter Bnaks[C]// IEEE NORSIG04, 2004:53-56.
 Srinicasan M,Chen C-C, Gray A. An All-Digital, High Data-Rate Parallel Receiver[R].Jet Propulsion Lab TDA Progress Report, 1997, vol. 42 -131.
 Liu Celine, An Jianping, Wang Cuilian, and so on. Low Complexity Frequency Domain Parallel Demodulation Architecture for Joint Symbol Synchronization [J]. Space Electronic Technology, 2013,10 (2): 17-19.
 Park S Y , Meher P K. Low-power, high-throughput, and low-area adaptive FIR filter based on distributed arithmetic[J]. IEEE Transations on Circuits and Systems II: Express Bricfs, 2013, 60(6): 346-350.