Education, Science, Technology, Innovation and Life
Open Access
Sign In

A novel voltage reference circuit without amplifier

Download as PDF

DOI: 10.23977/jeeem.2020.030101 | Downloads: 67 | Views: 4896

Author(s)

Zhen Zhang 1

Affiliation(s)

1 Department of Electronic Engineering, Jinan University, Guangzhou 510632, P. R. China

Corresponding Author

Zhen Zhang

ABSTRACT

A novel voltage reference circuit without amplifier is proposed in this paper. In this circuit, the difference between the two NMOS transistors operating in the sub-threshold region is applied to the resistor, thereby generating current with positive temperature coefficient, which is mirrored to the output circuit to generate voltage with positive temperature coefficient. The gate-source voltage of the NMOS operating in the sub-threshold region is added to the voltage with positive temperature coefficient, and finally reference voltage is generated that does not change with temperature, voltage and process. Compared with the traditional voltage reference circuit, the circuit is simplified by using negative feedback structure instead of amplifiers. This design is simulated based on 180 nm process and Cadence simulator. When the power supply voltage (VDD) is between 1.3 V and 2.5 V and the temperature (T) is between -80 °C and 90 °C, in the most ideal case, the temperature coefficient (TC) is 8.6 ppm/°C, the power supply rejection ratio (PSRR) is -32 dB both at 100 Hz and 10 kHz. In the typical VDD of 1.8 V, the reference voltage (VREF) is 684 mV, which can be applied to on-chip digital isolators, transceivers and temperature sensors, etc.

KEYWORDS

voltage reference; sub-threshold; negative feedback; temperature coefficient

CITE THIS PAPER

Zhen Zhang. A novel voltage reference circuit without amplifier. Journal of Electrotechnology, Electrical Engineering and Management (2020) Vol. 3: 1-7. DOI: http://dx.doi.org/10.23977/jeeem.2020.030101.

REFERENCES

[1] Ou X, Wu N J. Analog-digital and digital-analog converters using single-electron and MOS transistors [J]. IEEE transactions on nanotechnology, 2005, 4(6): 722-729.
[2] Little S, Walter D, Seegmiller N, et al. Verification of analog and mixed-signal circuits using timed hybrid petri nets[C]//International Symposium on Automated Technology for Verification and Analysis. Springer, Berlin, Heidelberg, 2004: 426-440.
[3] Kuijk K E. A precision reference voltage source[J]. IEEE Journal of Solid-State Circuits, 1973, 8(3): 222-226.
[4] Tham K M, Nagaraj K. A low supply voltage high PSRR voltage reference in CMOS process[J]. IEEE Journal of Solid-State Circuits, 1995, 30(5): 586-590.
[5] Malekkhosravi B, Woodard D J. Method and architecture for integrated circuit design and manufacture: U.S. Patent 7,032,191[P]. 2006-4-18.
[6] Leung C Y, Leung K N, Mok P K T. Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference[C]//2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No. 04CH37512). IEEE, 2004, 1: I-48.
[7] Ming X, Ma Y, Zhou Z, et al. A high-precision compensated CMOS bandgap voltage reference without resistors[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2010, 57(10): 767-771.
[8] Prilenski L, Mukund P R. A sub 1-volt subthreshold bandgap reference at the 14 nm FinFET node[J]. Microelectronics Journal, 2018, 79: 17-23.
[9] Osaki, Y. , Hirose, T. , Kuroki, N. , & Numa, M. . (2013). 1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs. IEEE Journal of Solid-State Circuits, 48(6), 1530-1538.

Downloads: 3015
Visits: 131829

Sponsors, Associates, and Links


All published work is licensed under a Creative Commons Attribution 4.0 International License.

Copyright © 2016 - 2031 Clausius Scientific Press Inc. All Rights Reserved.