Clock Glitch Fault Injection Attacks on an FPGA AES Implementation

Hailong Liu; Zhenglin Liu; Yifei Qiao; Zhaojun Lu

doi:10.23977/jeeem.2017.11005

Clock Glitch Fault Injection Attacks on an FPGA AES Implementation

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DOI: 10.23977/jeeem.2017.11005 | Downloads: 250 | Views: 8171

Author(s)

Zhenglin Liu ¹, Yifei Qiao ¹, Zhaojun Lu ¹, Hailong Liu ¹

Affiliation(s)

¹ Huazhong University of Science and Technology, Wuhan, China

Corresponding Author

Yifei Qiao

ABSTRACT

The Advanced Encryption Standard (AES) algorithm has been widely used to secure communication systems. However, the encryption algorithm is vulnerable to fault injection attacks and various attack methods have been studied. Some methods are just proposed in theory and have not been validated in practice. In this paper, we actualize a fault injection attack on an FPGA AES implementation. We propose a method to generate the highly accurate clock glitch to inject faults in the encryption process. We show that if the frequency of the clock glitch is carefully selected, only 6 faulty ciphertexts are necessary to discover the secret key.

KEYWORDS

AES, Fault injection attacks, Clock glitch, FPGA

CITE THIS PAPER

Yifei Q. , Zhaojun, L. , Hailong, L. and Zhenglin L. (2017) Clock Glitch Fault Injection Attacks on an FPGA AES Implementation. Journal of Electrotechnology, Electrical Engineering and Management (2017) 1: 23-27.

REFERENCES

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[5] A. Moradi, M. T. M. Shalmani, and M. Salmasizadeh: A generalized method of differential fault attack against AES cryptosystem, Proc. Int. WorkshopCryptogr. Hardware Embedded Syst. (2006), p. 91–100.
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Clock Glitch Fault Injection Attacks on an FPGA AES Implementation

Author(s)

Affiliation(s)

Corresponding Author

ABSTRACT

KEYWORDS

CITE THIS PAPER

REFERENCES

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